Efficient software implementation of binary field arithmetic using vector instruction sets

In this talk, we will describe an efficient software implementation of characteristic 2 fields making extensive use of vector instruction sets commonly found in desktop processors. Field elements are represented in a split form so performance-critical field operations can be formulated in terms of simple operations over 4-bit sets. In particular, we detail techniques for implementing field multiplication, squaring, square root extraction, half-trace and inversion and present a constant-memory lookup-based multiplication strategy. We illustrate performance with timings for scalar multiplication on binary curves at the 128-bit security level and compare our results with publicly available benchmarking data.

Date
Aug 1, 2012
Event
Microsoft Research
Location
Redmond, USA